An analog-to-digital converter (ADC) circuit can be used to convert an analog signal to a digital signal, which can then be further processed or used in the digital domain. A Successive Approximation Routine (SAR) ADC circuit can carry out bit trials to compare portions of the analog signal to a reference voltage to determine the digital bit values of a digital word representing a particular sample of the analog signal. A SAR ADC can use a capacitor array of a Digital-to-Analog Converter (DAC) for carrying out the bit trials for determining the respective digital bit values of the digital word. The bit trials can involve a certain amount of time, such as can be needed for a DAC signal to settle from a transient value to a stable value, for a preamplifier to provide gain amplification of a DAC signal to a particular level, and for a latch circuit to regenerate the preamplifier output to give a bit trial result. However, high speed bit trials are desired to obtain high speed signal conversion of the ADC.
A multichannel ADC integrated circuit (IC) can include multiple channels, individual channels including separate ADCs that can share a common precision reference voltage, for performing the bit trials, such as can be provided, stabilized, and stored on a large off-chip capacitor.